Simulated Channel Length Variation Effects on Regulated Cascode Input Stage-Based Transimpedance Amplifier for Fiber Optics Applications (AIUB Journal of Science and Engineering (AJSE), 2024)
A proposed transimpedance amplifier with channel length variation is simulated. The amplifier consists of a regulated cascode input stage followed by a common gate-common source configuration. A channel length series (45 nm, 90 nm and 130 nm) in CMOS technology was introduced within the proposed amplifier in order to achieve comparative performance analysis. There are two key findings from this study. On one hand, it was found that the trade off in gain versus bandwidth and input referred noise current still applies when channel length is moved upward from 45 nm up to 130 nm. A series of transimpedance amplifier gains (42.16 dBΩ, 44.34 dBΩ and 46.25 dBΩ) that correspond to (1.80 GHz, 1.33 GHz and 1.06 GHz) of  bandwidths is reported corresponding to the above channel length series respectively with an input referred noise current spectral density series (16.35 pA/sqrt(Hz), 12.17 pA/sqrt(Hz)  and 10.60 pA/sqrt(Hz)) of reduction. On the other hand, a reduction in power consumption occurred as channel length is moved upward for the same proposed topology. A total power consumption series (0.611 mW, 0.287 mW and 0.173 mW) was reported that corresponds to the above channel length series.